SK hynix is targeting roughly 14x HBM capacity at about half the bandwidth with High Bandwidth Flash.
But the more important development isn't the headline specification.
It's the possibility that AI inference will no longer need every byte of memory to sit in the most expensive tier.
Long-context inference and multi-turn agents create enormous KV caches. Some data needs immediate GPU access. Other data can be stored farther away and retrieved when needed.
HBF, pooled DRAM and shared SSDs are different attempts to exploit that distinction.
The investment implication isn't that NAND replaces HBM.
It's that memory economics may increasingly depend on how effectively systems move data between tiers, rather than simply how much HBM they install.
That could expand the opportunity for NAND and memory-system suppliers while making interconnect bandwidth, retrieval latency and software scheduling more important.
SK hynix targets HBF samples in early 2028. Commercial adoption remains unproven.
The real test is cost per successfully served token, including memory, data movement, latency and power—not capacity per chip alone.
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