TSMC’s 3nm and 2nm advanced process capacity, along with CoWoS advanced packaging, remains in short supply as demand stays strong in late Q3 2026. According to ChainCatcher, NVIDIA and Apple continue to absorb much of the advanced process and packaging supply, while Amazon Web Services’ Annapurna has recently increased AI chip tape-outs and secured more 3nm capacity.

MediaTek is also competing for 2nm and 3nm capacity and CoWoS-S/L supply, driven by large orders tied to Google TPU-related chips. Market reports said TSMC has recently adjusted its capacity allocation, and MediaTek’s 3nm and 2nm scheduling has been fine-tuned after winning the Google TPU order. The next-generation TPU v9 is expected to use both TSMC CoWoS-L and Intel EMIB-T. TSMC’s main 3nm customer is now NVIDIA, which surpassed Apple as the largest customer in 2025, while 2nm demand is led by Apple and others.

TSMC has accelerated expansion since early 2026. By the end of October, 2nm monthly capacity at Hsinchu Baoshan Fab 20 and Kaohsiung Fab 22 is expected to reach 50,000 wafers each, or about 100,000 wafers combined, while 3nm monthly capacity in Tainan is expected to reach about 185,000 wafers. Overall utilization was about 96.2% at the end of September, with processes from 16nm and 12nm down to 2nm running at 100%. Packaging shortages have also pushed advanced packaging orders outward, with ASE Group’s SPIL taking priority, followed by Amkor and Powertech. Powertech’s related testing and packaging capacity is fully booked, with order visibility extending to 2028.