IT Home August 25 news: Tech media Wccftech published a blog post yesterday (August 24), reporting that at Hot Chips 2026, Arm disclosed details of an AGI CPU aimed at agentic AI. This is the company’s first self-developed, mass-produced chip since its founding 36 years ago.

The processor is based on the 3rd-generation Neoverse V3 cores, built on the Armv9.2 architecture. Up to 136 cores can be configured on a single chip. Each core is equipped with a dedicated 2 MB L2 cache, and the maximum clock frequency is 3.7 GHz.

The chip uses TSMC’s 3nm process (N3P) and a dual-chiplet (Dual Chiplets) design. Each chiplet contains more than 50 billion transistors, while the complete chip has 100 billion transistors. The chip’s maximum TDP is 300 W. The processor integrates memory and I/O on the same chip to support low-latency memory access, with memory latency below 100 ns.

In terms of I/O, the processor provides 96 PCIe Gen6 lanes, supports CXL 3.0 memory and expansion devices, and is equipped with an AMBA CHI extension link. It supports DDR5-8800 memory, giving each core 6 GB/s of memory bandwidth, with a single-chip capacity of 6 TB.

Neoverse V3 cores include a branch prediction unit and an instruction prefetcher. The instruction fetch portion is equipped with a 64 KB instruction cache, the frontend decode queue is 10-wide, and the decode unit uses a 10-wide design. The rename and dispatch units have an out-of-order execution window with more than 384 entries, supporting 10-wide dispatch and 8-wide commit.

Advanced SIMD pipeline uses dual 128-bit low-latency data paths. The load-to-use latency for the L2 cache is 10 cycles, with a transfer capability of 128 B per cycle; each core is equipped with a 2 MB private L2 cache.