Huawei’s Ascend 950PR delivered matrix-computing speeds equal to 43% of Nvidia’s H100 in tests. According to ChainCatcher, semiconductor research firm SemiAnalysis tested 1,055 matrix operations commonly used in large AI models. Huawei’s low-level software enabled the 950PR to reach 86% of its attainable computing performance, compared with 75.5% for the H100. However, the 950PR’s actual speed was 21% of the newer B300’s; the benchmark did not include operators recently ported by DeepSeek.

DeepSeek is working on software changes to reduce data transfers and waiting times. FlashMLA changes data storage for attention calculations so two data sets that previously had to be read separately can be accessed together. TileLang allows a chip to preload the next batch of data while computing. SemiAnalysis found that automated scheduling cut the time for some small computing tasks by up to about 40%. DeepSeek has also ported DeepEP, which handles communication among mixture-of-experts (MoE) models, but communication and computation still compete for memory bandwidth. Huawei plans further firmware improvements.

Last year, DeepSeek tried to train R2 on Huawei Ascend chips, but the effort did not succeed despite on-site assistance from Huawei engineers. The reported challenges involved chip stability, communication across chips and software support. Cooperation continued this year: DeepSeek publicly released six sets of Ascend adaptation code in late September, and reports in October said Huawei was adjusting its next-generation chip design to meet DeepSeek’s model requirements.

The 950PR is primarily designed to process inference inputs. DeepSeek plans to use the 950DT for large-scale pretraining as early as year-end. The two sides have conducted tests at the 1,000-chip scale, but running a full large-model training cycle continuously on tens of thousands of chips will require addressing more complex coordination and stability issues.